/* $NetBSD: psl.h,v 1.50.4.1 2023/08/09 17:42:02 martin Exp $ */ /* * Copyright (c) 1992, 1993 * The Regents of the University of California. All rights reserved. * * This software was developed by the Computer Systems Engineering group * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and * contributed to Berkeley. * * All advertising materials mentioning features or use of this software * must display the following acknowledgement: * This product includes software developed by the University of * California, Lawrence Berkeley Laboratory. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * 1. Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * 2. Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in the * documentation and/or other materials provided with the distribution. * 3. Neither the name of the University nor the names of its contributors * may be used to endorse or promote products derived from this software * without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * * @(#)psl.h 8.1 (Berkeley) 6/11/93 */ #ifndef PSR_IMPL /* * SPARC Process Status Register (in psl.h for hysterical raisins). This * doesn't exist on the V9. * * The picture in the Sun manuals looks like this: * 1 1 * 31 28 27 24 23 20 19 14 3 2 11 8 7 6 5 4 0 * +-------+-------+-------+-----------+-+-+-------+-+-+-+---------+ * | impl | ver | icc | reserved |E|E| pil |S|P|E| CWP | * | | |n z v c| |C|F| | |S|T| | * +-------+-------+-------+-----------+-+-+-------+-+-+-+---------+ */ #define PSR_IMPL 0xf0000000 /* implementation */ #define PSR_VER 0x0f000000 /* version */ #define PSR_ICC 0x00f00000 /* integer condition codes */ #define PSR_N 0x00800000 /* negative */ #define PSR_Z 0x00400000 /* zero */ #define PSR_O 0x00200000 /* overflow */ #define PSR_C 0x00100000 /* carry */ #define PSR_EC 0x00002000 /* coprocessor enable */ #define PSR_EF 0x00001000 /* FP enable */ #define PSR_PIL 0x00000f00 /* interrupt level */ #define PSR_S 0x00000080 /* supervisor (kernel) mode */ #define PSR_PS 0x00000040 /* previous supervisor mode (traps) */ #define PSR_ET 0x00000020 /* trap enable */ #define PSR_CWP 0x0000001f /* current window pointer */ #define PSR_BITS "\20\16EC\15EF\10S\7PS\6ET" /* * SPARC V9 CCR register */ #define ICC_C 0x01L #define ICC_V 0x02L #define ICC_Z 0x04L #define ICC_N 0x08L #define XCC_SHIFT 4 #define XCC_C (ICC_C<>(TSTATE_CCR_SHIFT-20)) /* * These are here to simplify life. */ #define TSTATE_IG (PSTATE_IG<> 20) & 0x3); } static __inline __attribute__((__always_inline__)) void setpsr(int newpsr) { __asm volatile("wr %0,0,%%psr" : : "r" (newpsr) : "memory"); __asm volatile("nop; nop; nop"); } static __inline __attribute__((__always_inline__)) void spl0(void) { int psr, oldipl; /* * wrpsr xors two values: we choose old psr and old ipl here, * which gives us the same value as the old psr but with all * the old PIL bits turned off. */ __asm volatile("rd %%psr,%0" : "=r" (psr) : : "memory"); oldipl = psr & PSR_PIL; __asm volatile("wr %0,%1,%%psr" : : "r" (psr), "r" (oldipl)); /* * Three instructions must execute before we can depend * on the bits to be changed. */ __asm volatile("nop; nop; nop"); } /* * PIL 1 through 14 can use this macro. * (spl0 and splhigh are special since they put all 0s or all 1s * into the ipl field.) */ #define _SPLSET(name, newipl) \ static __inline __attribute__((__always_inline__)) void name(void) \ { \ int psr; \ __asm volatile("rd %%psr,%0" : "=r" (psr)); \ psr &= ~PSR_PIL; \ __asm volatile("wr %0,%1,%%psr" : : \ "r" (psr), "n" ((newipl) << 8)); \ __asm volatile("nop; nop; nop" : : : "memory"); \ } _SPLSET(spllowerschedclock, IPL_SCHED) static inline __always_inline ipl_cookie_t makeiplcookie(ipl_t ipl) { return (ipl_cookie_t){._ipl = ipl}; } /* Raise IPL and return previous value */ static __inline __always_inline int splraiseipl(ipl_cookie_t icookie) { int newipl = icookie._ipl; int psr, oldipl; __asm volatile("rd %%psr,%0" : "=r" (psr)); oldipl = psr & PSR_PIL; newipl <<= 8; if (newipl <= oldipl) return (oldipl); psr = (psr & ~oldipl) | newipl; __asm volatile("wr %0,0,%%psr" : : "r" (psr)); __asm volatile("nop; nop; nop" : : : "memory"); return (oldipl); } #include #define splausoft() splraiseipl(makeiplcookie(IPL_SOFTAUDIO)) #define splfdsoft() splraiseipl(makeiplcookie(IPL_SOFTFDC)) #define splfd() splraiseipl(makeiplcookie(IPL_FD)) #define splts102() splraiseipl(makeiplcookie(IPL_TS102)) #define splzs() splraiseipl(makeiplcookie(IPL_ZS)) /* splx does not have a return value */ static __inline __attribute__((__always_inline__)) void splx(int newipl) { int psr; __asm volatile("rd %%psr,%0" : "=r" (psr) : : "memory"); __asm volatile("wr %0,%1,%%psr" : : \ "r" (psr & ~PSR_PIL), "rn" (newipl)); __asm volatile("nop; nop; nop"); } #endif /* KERNEL && !_LOCORE */ #endif /* PSR_IMPL */